Call it as seismic changes or consolidation, the chip manufacturing world is going through some upheaval. While on one end, quite a few IDMs are transitioning to a fab lite strategy (albeit in different flavours) - especially with the high costs & risks involved in sub 65nm, on the other end heavyweights like TSMC are spreading their reach into the IP arena too.
As I noted in an earlier post, TSMC is leveraging on its resources and market reach.It may start off as “strengthening the design collaboration for critical sub circuits” (who doesn’t want FTSS??) but the intensity of the move has been enough to spread ripples in the till now independent IP biz world. By doing so, TSMC may well be doing its share in mitigating some of the risks involved in DSM design and thus catalyzing more of these design starts; and subsequently fill up its high-end fabs.
Showing posts with label Semiconductor. Show all posts
Showing posts with label Semiconductor. Show all posts
Tuesday, May 22, 2007
Monday, May 14, 2007
Renesas seeks to keep its own process technology
Renesas seems to be bucking the trend of IDMs relying more and more on foundries for advanced process technology development.
Renesas believes in working (on its own or in collaboration) on advanced process development. With plans to increase sales in system-on-chip solutions and microcontrollers, it may make sense to keep the advanced process development in-house in order to have more control and direction for their major product offerings.
This, however, will not prevent it from outsourcing for volume production on advanced devices
Renesas believes in working (on its own or in collaboration) on advanced process development. With plans to increase sales in system-on-chip solutions and microcontrollers, it may make sense to keep the advanced process development in-house in order to have more control and direction for their major product offerings.
This, however, will not prevent it from outsourcing for volume production on advanced devices
Tuesday, May 08, 2007
Singapore's 5M$ wafer fab training program funding
The Economic Development Board (EDB) has recently announced that it will invest over $5 million over the next three years into a program, Wafer Fabrication Specialist Manpower Program, designed to groom more wafer fabrication experts at local universities; aim is 300 new engineers to meet the chip industry demand.
The funds jointly contributed by the government and industry, would be used to provide monthly stipends of up to $710 to engineering undergraduates specializing in wafer fabrication in their final years of study at the National University of Singapore and Nanyang Technological University.
With more & diverse career options available to the students and the emerging of newer semiconductor/microelectronics hotbeds in the region, this program may help to address the manpower gap faced by the industry.
The funds jointly contributed by the government and industry, would be used to provide monthly stipends of up to $710 to engineering undergraduates specializing in wafer fabrication in their final years of study at the National University of Singapore and Nanyang Technological University.
With more & diverse career options available to the students and the emerging of newer semiconductor/microelectronics hotbeds in the region, this program may help to address the manpower gap faced by the industry.
Wednesday, April 25, 2007
TSMC's IP moves stir up concern among providers
TSMC is broadening it’s portfolio of internally developed IPs and 3rd party IPs. It had started a program called IP-9000, later renamed to Active Accuracy Assurance Program, to qualify various IPs in its foundries. The objective was to expedite the design time with silicon proven 3rd party IPs.
With shorter design cycle time and with IPs becoming mandatory blocks in a design, the need for silicon proven IPs is not just desirable but also essential. Having a broad and quality IP portfolio is a big asset. If TSMC is getting into the ASIC like biz model, then indeed it is worrisome for the 3rd party IP vendors; especially the smaller ones who aspire to gain market share on the basis of their expertise in niche areas. The field gets all the more “unlevel”. But then it is a competitive world and TSMC would be leveraging on its resources and market reach.
A point to be noted is that, does this mean the resurrection of ASICs - often ranted about as dead ??
With shorter design cycle time and with IPs becoming mandatory blocks in a design, the need for silicon proven IPs is not just desirable but also essential. Having a broad and quality IP portfolio is a big asset. If TSMC is getting into the ASIC like biz model, then indeed it is worrisome for the 3rd party IP vendors; especially the smaller ones who aspire to gain market share on the basis of their expertise in niche areas. The field gets all the more “unlevel”. But then it is a competitive world and TSMC would be leveraging on its resources and market reach.
A point to be noted is that, does this mean the resurrection of ASICs - often ranted about as dead ??
Monday, April 09, 2007
Medical field may push India's IC industry
TI’s CEO & President, Rich Templeton, mentioned the importance of medical equipment biz for India’s semiconductor industry during his visit to India.
Applications in the medical area, along with automotive applications hold prominence in the near future for the semiconductor industry in general, albeit a lot more in emerging markets like India and China. While consumer and telecom applications still remain strong contenders and are mainstream applications, the potential for these emerging segments is huge.
The shortened market window & pricing pressures for applications like entertainment/computing etc. falling under the generic consumer umbrella doesn’t give a leveling field to the smaller or niche players. This is where these yet to be fully tapped markets like medical and automotive hold the lure. Emerging market with strong potential which does not necessarily require the leading edge process ….. these can very well also pave the way for process choice in the soon to be set up foundries in India.
Applications in the medical area, along with automotive applications hold prominence in the near future for the semiconductor industry in general, albeit a lot more in emerging markets like India and China. While consumer and telecom applications still remain strong contenders and are mainstream applications, the potential for these emerging segments is huge.
The shortened market window & pricing pressures for applications like entertainment/computing etc. falling under the generic consumer umbrella doesn’t give a leveling field to the smaller or niche players. This is where these yet to be fully tapped markets like medical and automotive hold the lure. Emerging market with strong potential which does not necessarily require the leading edge process ….. these can very well also pave the way for process choice in the soon to be set up foundries in India.
Saturday, March 31, 2007
HSMC to chip in 4 bn$ for Indian fabs
I had reported in an earlier post “India outlines long awaited IC policy”, that the Indian govt.’s announcement of Special Incentives Package Scheme is likely to be followed by announcements by potential investors.
While SemIndia had already proposed investment in partnership with AMD, the latest one is from Hindustan Semiconductor Manufacturing Corporation (HSMC), a Silicon Valley-based semiconductor company. It has announced its plans to invest over $4 billion in chip foundries in India and has roped in Infineon as its technology partner; Infineon will license its 0.13u process techno and has said that it is open to considering an equity participation ‘subject to the final contract’.
According to a study by Frost and Sullivan, the semiconductor market in India is expected to grow from $3.25 billion in 2006 to $36 billion in 2015. The Indian govt. has announced Special Incentives Package Scheme, MoUs are being signed, what is to be seen now is the implementation of these plans and the coming up of the fabcities.
While SemIndia had already proposed investment in partnership with AMD, the latest one is from Hindustan Semiconductor Manufacturing Corporation (HSMC), a Silicon Valley-based semiconductor company. It has announced its plans to invest over $4 billion in chip foundries in India and has roped in Infineon as its technology partner; Infineon will license its 0.13u process techno and has said that it is open to considering an equity participation ‘subject to the final contract’.
According to a study by Frost and Sullivan, the semiconductor market in India is expected to grow from $3.25 billion in 2006 to $36 billion in 2015. The Indian govt. has announced Special Incentives Package Scheme, MoUs are being signed, what is to be seen now is the implementation of these plans and the coming up of the fabcities.
Tuesday, March 20, 2007
India's semiconductor policy - the ongoing debate
Read this article (Nadamuni says, in EE Times) ; Wanted to submit my comments there but looks like a perpetual error while submitting comments.....
2 issues which could be of concern to the fledgling Indian semiconductor market are: potential overcapacity situation and offering an attractive pricing strategy in face of strong competition from established regional foundries.
Investing with new equipment in light of the above and especially with the unavailability of incentives for such plants i.e. with second hand semiconductor equipment will make the potential investors wary.
However, having said that, if India were to offer the same set of incentives for second hand semicon equipment too, it’ll take a long time for it to catch up with cutting edge technology fabs as well as to address the design needs of the local design houses which have emerged from working on trailing edge technos to the leading edge ones.
Perhaps, a different set of incentives could work……???
2 issues which could be of concern to the fledgling Indian semiconductor market are: potential overcapacity situation and offering an attractive pricing strategy in face of strong competition from established regional foundries.
Investing with new equipment in light of the above and especially with the unavailability of incentives for such plants i.e. with second hand semiconductor equipment will make the potential investors wary.
However, having said that, if India were to offer the same set of incentives for second hand semicon equipment too, it’ll take a long time for it to catch up with cutting edge technology fabs as well as to address the design needs of the local design houses which have emerged from working on trailing edge technos to the leading edge ones.
Perhaps, a different set of incentives could work……???
Monday, March 19, 2007
UMC to open support office in India
UMC has announced that it plans to open a support office in Hyderabad, India. The main charter is to support India based customers. This is close on heels with TSMC’s setting up office in Bangalore, India.
Tuesday, February 27, 2007
India outlines long awaited IC policy
After several hiccups, India has announced its IC policy.
Dubbed the Special Incentive Package Scheme, the initiative is focused on attracting investments for setting up semiconductor plants and other technology manufacturing industries. Semiconductor companies seeking incentives—which will be 20 percent of the capital expenditure during the first 10 years—will have to invest a minimum $550 million, according to the plan.
The salient points were announced Feb. 22 with details to be out in the coming two weeks in a document that spells out the specifics about the level of equity, the interest-free component and other financial details.
This announcement is most likely to be followed by announcements by potential investors. AMD has already announced a technology pact with SemIndia Inc. for a semiconductor manufacturing facility in Hyderabad.
At least two more semiconductor manufacturing facilities are expected to be announced in the next few weeks, according to Raj Khare, chairman, India Semiconductor Association.
Samsung, Freescale, Motorola, Intel, Infineon, STMicrorelectronics and Toshiba are among the possible investors in a Rs.20,394 crore ($4.5 billion) manufacturing facility being set up by the Hindustan Semiconductor Manufacturing Corp. (HSMC) which is expected to establish a fabrication complex that will include several foundries to be built by HSMC. The fabs will 200- and 300mm wafer lines.
It has to be seen if and how the various consortiums as well as companies like Intel etc. tread on this “red carpet” rolled out by the Indian govt. And having decided to tread, it has to be seen which technology direction will these new fabs take up (as noted in my earlier post, “Vision Summit explores strategies driving semicon industry growth”)
Dubbed the Special Incentive Package Scheme, the initiative is focused on attracting investments for setting up semiconductor plants and other technology manufacturing industries. Semiconductor companies seeking incentives—which will be 20 percent of the capital expenditure during the first 10 years—will have to invest a minimum $550 million, according to the plan.
The salient points were announced Feb. 22 with details to be out in the coming two weeks in a document that spells out the specifics about the level of equity, the interest-free component and other financial details.
This announcement is most likely to be followed by announcements by potential investors. AMD has already announced a technology pact with SemIndia Inc. for a semiconductor manufacturing facility in Hyderabad.
At least two more semiconductor manufacturing facilities are expected to be announced in the next few weeks, according to Raj Khare, chairman, India Semiconductor Association.
Samsung, Freescale, Motorola, Intel, Infineon, STMicrorelectronics and Toshiba are among the possible investors in a Rs.20,394 crore ($4.5 billion) manufacturing facility being set up by the Hindustan Semiconductor Manufacturing Corp. (HSMC) which is expected to establish a fabrication complex that will include several foundries to be built by HSMC. The fabs will 200- and 300mm wafer lines.
It has to be seen if and how the various consortiums as well as companies like Intel etc. tread on this “red carpet” rolled out by the Indian govt. And having decided to tread, it has to be seen which technology direction will these new fabs take up (as noted in my earlier post, “Vision Summit explores strategies driving semicon industry growth”)
Friday, February 16, 2007
Grading of India's semicon industry
ISA-Ernst & Young, India’s recently released report presents a snapshot of India’s semicon industry.
Some of the salient points are:
Talent quality: Moderate (US rated very high)
Talent Availability & scalability: Very Well (4th amongst peers, US rated 3rd )
Technical education quality: Moderate (rated 5th, US rated very high)
Talent cost advantage: Very well (Best along with China, US rated lowest)
Peer countries selected for study: Canada, China, Czech Republic, India, Israel, Taiwan, the United Kingdom and the United States
Other than the more prevalent known aspects as cited above, the report underscored a few interesting and vital points:
- India’s need to conceptualize & build products and move up the value chain
- Relatively lower level of electronics manufacturing which adversely impacts the semicon market potential
- Need to increase IP registration
Some of the salient points are:
Talent quality: Moderate (US rated very high)
Talent Availability & scalability: Very Well (4th amongst peers, US rated 3rd )
Technical education quality: Moderate (rated 5th, US rated very high)
Talent cost advantage: Very well (Best along with China, US rated lowest)
Peer countries selected for study: Canada, China, Czech Republic, India, Israel, Taiwan, the United Kingdom and the United States
Other than the more prevalent known aspects as cited above, the report underscored a few interesting and vital points:
- India’s need to conceptualize & build products and move up the value chain
- Relatively lower level of electronics manufacturing which adversely impacts the semicon market potential
- Need to increase IP registration
Sunday, February 11, 2007
Vision Summit explores strategies driving semicon industry growth
A couple of contrasting views over the fab technology direction that India should follow was reported from the ISA Vision Summit 2007. While one view stated that it’ll be prudent for India to initially establish manufacturing capacities in older technologies and address those requirements which are not addressed by the more competitive larger multinational companies. Else it will fall prey to overcapacity problem.
A conflicting view presented some of the alternate views of addressing the overcapacity situation. In India’s case, it can be by focusing on technologies which are driven by applications of the products required by the local market i.e. applications are the fab techno drivers and not any predetermined process geometry.
A conflicting view presented some of the alternate views of addressing the overcapacity situation. In India’s case, it can be by focusing on technologies which are driven by applications of the products required by the local market i.e. applications are the fab techno drivers and not any predetermined process geometry.
Tuesday, February 06, 2007
TSMC sets up office in India
TSMC has announced the opening up of its office in Bangalore, India with the primary mission of supporting its existing customers with design activities in India. They see a huge increase in the number of advance technology designs coming from India.
What surprises me is their delay till date. With no major advance tech fab in the country, delays in fab investments/policies and spurt of fabless design companies, there had long been the potential of strengthening biz thru local presence.
What surprises me is their delay till date. With no major advance tech fab in the country, delays in fab investments/policies and spurt of fabless design companies, there had long been the potential of strengthening biz thru local presence.
Monday, January 29, 2007
Intel and 45nm technology breakthrough
Intel is hogging the silicon limelight with it’s news on the technology breakthrough - usage of high-k and metal gate transistors for 45nm technology.
Scaling without losing out much on leakage is the driving advantage. The major advantage, though, is that with this technique, Intel will not have to significantly change its current production process. This is different from the alternative solution being disclosed by IBM and its partners. The latter involves SOI which is a more expensive production technique and they plan to later switch to immersion lithography. Another lead for Intel is that the production with this new technique starts mid this year whereas IBM plans production in end 2008.
Having said that, it still appears that while Intel has stolen the lead in announcing the breakthrough with earlier production planned (and that too across servers, desktops and laptop applications), IBM will have a long term advantage as its technology involves integration of the metal gates so that they are embedded in silicon as compared to Intel where they sit atop a proven silicon architecture – thus solving long range problems and more future transitions.
Scaling without losing out much on leakage is the driving advantage. The major advantage, though, is that with this technique, Intel will not have to significantly change its current production process. This is different from the alternative solution being disclosed by IBM and its partners. The latter involves SOI which is a more expensive production technique and they plan to later switch to immersion lithography. Another lead for Intel is that the production with this new technique starts mid this year whereas IBM plans production in end 2008.
Having said that, it still appears that while Intel has stolen the lead in announcing the breakthrough with earlier production planned (and that too across servers, desktops and laptop applications), IBM will have a long term advantage as its technology involves integration of the metal gates so that they are embedded in silicon as compared to Intel where they sit atop a proven silicon architecture – thus solving long range problems and more future transitions.
Thursday, January 25, 2007
Freescale places R&D bet with IBM
Another salvo to Crolles2 Alliance. After NXP’s announcement on its exit from Crolles2 Alliance, comes the statement from Freescale that it is joining the IBM Alliance.
Apart from investing in leading edge chip R&D, some of the potential benefits for Freescale in this alliance are leveraging capacity at Chartered and possible wireless co-development efforts with Infineon. Freescale also expects to significantly accelerate its SOI roadmap with this IBM partnership.
This leaves STM as the lone original member of the Crolles2 alliance. A potential new partner will need to have deep pockets to fund expansion of the group’s 300mm fab as well as work on 45nm and beyond processes. This is apart from a good fit from the technology standpoint. TI is touted as one of the possible candidates. However with the latest announcement from TI to end leading edge digital logic process development at 45nm and rely on foundries is set to have important implications on this.
Apart from investing in leading edge chip R&D, some of the potential benefits for Freescale in this alliance are leveraging capacity at Chartered and possible wireless co-development efforts with Infineon. Freescale also expects to significantly accelerate its SOI roadmap with this IBM partnership.
This leaves STM as the lone original member of the Crolles2 alliance. A potential new partner will need to have deep pockets to fund expansion of the group’s 300mm fab as well as work on 45nm and beyond processes. This is apart from a good fit from the technology standpoint. TI is touted as one of the possible candidates. However with the latest announcement from TI to end leading edge digital logic process development at 45nm and rely on foundries is set to have important implications on this.
Wednesday, January 17, 2007
NXP exits Crolles2 Alliance
In its new avatar, Philips Semiconductor, now NXP exits Crolles2 Alliance, a partnership formed in 2000 and renewed in 2002, and teams up with TSMC.
As we further scale the technologies and the fab and associated costs increase, alliances is no longer an option; it’s mandatory. Amongst the present big ones, the Chartered, IBM, Samsung, Infineon alliance seems to be the more promising one overall. IBM is also reportedly in talks with the other two Crolles2 partners, STM and Freescale, to join Crolles2 Alliance.
Freescale had been pushing to get IBM into the Alliance while STM was pushing for TSMC. NXP has an asset lite strategy (it plans to increase its outsourcing ratio to 40% by 2010, from its present 10-20%) and it seems logical for it to strengthen its cooperation with its long time foundry partner, TSMC.
As we further scale the technologies and the fab and associated costs increase, alliances is no longer an option; it’s mandatory. Amongst the present big ones, the Chartered, IBM, Samsung, Infineon alliance seems to be the more promising one overall. IBM is also reportedly in talks with the other two Crolles2 partners, STM and Freescale, to join Crolles2 Alliance.
Freescale had been pushing to get IBM into the Alliance while STM was pushing for TSMC. NXP has an asset lite strategy (it plans to increase its outsourcing ratio to 40% by 2010, from its present 10-20%) and it seems logical for it to strengthen its cooperation with its long time foundry partner, TSMC.
Tuesday, December 19, 2006
Private equity chips away at semiconductor industry
A highly interesting article in Electronic Business by Tam Harbert.
Private equity firms target cash rich semiconductor entities, leverage on its cash flow to borrow more funds and then restructure, improve the company’s bottom line and then sell it or take it public; providing returns of 30-40%. Tam lists the reasons behind recent LBOs in the semiconductor space – industry being driven by the less cyclic consumer market, transition to fab-lite/fabless models and a better control over inventory.
The question which arises is that why hasn’t the chip industry taken the necessary steps to consolidate and leave that task to the private equity guys? iSupply’s Derek Lidow cites portfolio management as the reason. While chip companies, usually run by engineers structure the portfolio on technology, private equity folks tend to manage groups of products on market segments and geographical regions; rather than technology criterion. They acquire and merge companies that have similar product portfolios.
While on mergers and acquisitions, Mentor Graphics’ CEO, Wally Rhines mentioned in a recent article that the role of acquisitions in EDA industry is set to change. As the acquisitions in the past few years have failed to garner commensurate market capitalization, he opines that companies will either pay less for acquisitions or stop making them.
Private equity firms target cash rich semiconductor entities, leverage on its cash flow to borrow more funds and then restructure, improve the company’s bottom line and then sell it or take it public; providing returns of 30-40%. Tam lists the reasons behind recent LBOs in the semiconductor space – industry being driven by the less cyclic consumer market, transition to fab-lite/fabless models and a better control over inventory.
The question which arises is that why hasn’t the chip industry taken the necessary steps to consolidate and leave that task to the private equity guys? iSupply’s Derek Lidow cites portfolio management as the reason. While chip companies, usually run by engineers structure the portfolio on technology, private equity folks tend to manage groups of products on market segments and geographical regions; rather than technology criterion. They acquire and merge companies that have similar product portfolios.
While on mergers and acquisitions, Mentor Graphics’ CEO, Wally Rhines mentioned in a recent article that the role of acquisitions in EDA industry is set to change. As the acquisitions in the past few years have failed to garner commensurate market capitalization, he opines that companies will either pay less for acquisitions or stop making them.
Thursday, December 14, 2006
No major fab investments for India in 2007 - Gartner says
Gartner predicts that there will not be any major fab investments for India in 2007. There indeed is a lot of buzz for India in the design space. It has led to major collaborations as well as investments. Global contract manufacturers have entered with an eye on the huge local market potential. While a few consortia have plans, some of which have started on their first stages, it will take some time before any further significant investment is done towards setting up fabs and moving India to a design plus manufacturing hub.
Monday, December 11, 2006
Cisco announces updates on its 1.1 B$ investments in India
In October 2005, John Chambers, Chairman and CEO Cisco Systems had announced a 1.1 B$ investment in India. In his recent visit to India last week, he re-iterated Cisco’s commitment while outlining the importance of India in Cisco’s global growth strategy.
Cisco’s key investments in India include a new R&D campus in Bangalore, increasing by threefold its local workforce, launching a manufacturing pilot facility for local market and allocating funds for venture capital investments in high growth and nascent companies based in India. Investments are expected in companies involved in broadband content and digital media.
All these are in line with John’s vision of the network becoming the platform for all forms of communication and ICT – also the topic of his interesting talk in Singapore last Friday.
Cisco’s key investments in India include a new R&D campus in Bangalore, increasing by threefold its local workforce, launching a manufacturing pilot facility for local market and allocating funds for venture capital investments in high growth and nascent companies based in India. Investments are expected in companies involved in broadband content and digital media.
All these are in line with John’s vision of the network becoming the platform for all forms of communication and ICT – also the topic of his interesting talk in Singapore last Friday.
Sunday, December 03, 2006
Fabless Qualcomm zooms to next node
Qualcomm, with its IFM (Integrated Fabless Manufacturing) strategy is quietly but steadily decreasing the gap between itself and IDMs in new process adoption time. The world’s largest fabless design company is leading the way in how the fabless design community needs to overcome the DSM hurdles of the widening gaps between IC design and manufacturing flows.
While not exactly striving to be process experts, Qualcomm has formed a virtual manufacturing organization including its VLSI Technology organization and DFX unit which has helped it to understand, appreciate and thus resolve a host of complex and costly issues. The results, closing of the technology gap with the IDMs, are the proof.
They are cautious enough, though, as to not necessarily be the first ones to ship out a new product on a new technology node.
With Paul Jacobs’ strategy of making people understand that Qualcomm is a wireless technology company and not just a CDMA company, it needs all the efforts and results to zoom to the next node in a competitive manner.
While not exactly striving to be process experts, Qualcomm has formed a virtual manufacturing organization including its VLSI Technology organization and DFX unit which has helped it to understand, appreciate and thus resolve a host of complex and costly issues. The results, closing of the technology gap with the IDMs, are the proof.
They are cautious enough, though, as to not necessarily be the first ones to ship out a new product on a new technology node.
With Paul Jacobs’ strategy of making people understand that Qualcomm is a wireless technology company and not just a CDMA company, it needs all the efforts and results to zoom to the next node in a competitive manner.
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