tag:blogger.com,1999:blog-105685902012-02-03T13:22:27.789+08:00Ruminations on trends in the microelectronics arenaMeenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.comBlogger851100tag:blogger.com,1999:blog-10568590.post-84125806748616197912007-06-05T16:13:00.000+08:002007-06-05T16:17:27.836+08:00

Hi folks, I'm moving this blog to another server. You can access this blog now at www.asic-vlsi.com/blog. See you there!

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com5tag:blogger.com,1999:blog-10568590.post-66043484792257502212007-05-24T21:57:00.000+08:002007-05-24T21:59:50.982+08:00

IBM and its Common Platform agreement partners will extend their development relationship to 32nm too.The group started with 2 partners – IBM and Chartered. This later included Infineon, Samsung, and now Freescale. In addition, with the collapse of Crolles Alliance, it can also draw more partners.While collaboration is a necessity in these process nodes and the Common Platform Agreement has been

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-1479172822405636662007-05-24T21:50:00.000+08:002007-05-24T21:56:35.723+08:00

So, a foundry has closed the gap with an IDM!In all likelihoods, TSMC will be in volume production for 45nm at the same time as Intel – in first half of 2008. As noted by David Manners in an an earlier post, “With all this third party expertise soaking up the industry’s value-add, where is there to go for the IDMs?”

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-19652787533243362832007-05-22T16:59:00.000+08:002007-05-22T17:03:51.838+08:00

Call it as seismic changes or consolidation, the chip manufacturing world is going through some upheaval. While on one end, quite a few IDMs are transitioning to a fab lite strategy (albeit in different flavours) - especially with the high costs & risks involved in sub 65nm, on the other end heavyweights like TSMC are spreading their reach into the IP arena too.As I noted in an earlier post, TSMC

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-36317230146969451582007-05-21T21:23:00.000+08:002007-05-21T21:26:30.259+08:00

In the recent spate of takeovers by the private equity world and at a time when the chip industry is undergoing consolidation, a blip has occurred – Temasek Holdings’ wholly owned subsidiary, Singapore Technologies Semiconductors Pte Ltd. (STSPL) has failed to complete its attempted buyout of test and assembly provider STATS ChipPAC Ltd. STSPL now has a majority stake of 83.1 percent in the

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-64711406415638302032007-05-18T14:03:00.000+08:002007-05-18T14:07:32.976+08:00

Cadence is slated to release its Low Power Methodology Kit in late June. The highlight of the kit is a wireless "representative design" implemented using multi-supply voltage and power shutoff methods. It comes with all the necessary command scripts and technology files to complete the design. The design has sample IP including a processor and bus fabric from ARM, Wi-Fi from Wipro, USB 2.0 from

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-60931881669460517092007-05-14T17:22:00.000+08:002007-05-14T17:25:39.605+08:00

Renesas seems to be bucking the trend of IDMs relying more and more on foundries for advanced process technology development.Renesas believes in working (on its own or in collaboration) on advanced process development. With plans to increase sales in system-on-chip solutions and microcontrollers, it may make sense to keep the advanced process development in-house in order to have more control and

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com2tag:blogger.com,1999:blog-10568590.post-8719579150161676332007-05-12T14:53:00.000+08:002007-05-12T14:58:14.522+08:00

Mark LaPedus reports in his article in EETimes about TI’s approach towards IC manufacturing – while bolstering its in-house effort in analog production, TI is shifting more of its logic based work & process flow to foundries.TI is adopting a 3 pronged approach based on its product categories - At the 65-nm node, TI has three foundry partners for its wireless chips: Chartered, TSMC and UMC. For

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com2tag:blogger.com,1999:blog-10568590.post-77954385148490164912007-05-10T13:38:00.000+08:002007-05-10T13:40:28.717+08:00

According to a news report, LSI Corp. is considering whether or not to continue its Consumer Electronics (CE) business. It was however clarified that this would not impact the company’s focus on its chips for mobile phones.This comes closely on the heels of the revelation by LSI Corp. that it repurchased 5 million shares, worth $43 million, of its common stock in the past couple of days following

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-66998936903436809512007-05-08T12:07:00.000+08:002007-05-08T12:09:34.810+08:00

The Economic Development Board (EDB) has recently announced that it will invest over $5 million over the next three years into a program, Wafer Fabrication Specialist Manpower Program, designed to groom more wafer fabrication experts at local universities; aim is 300 new engineers to meet the chip industry demand.The funds jointly contributed by the government and industry, would be used to

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-25219815429422638682007-05-07T14:43:00.000+08:002007-05-07T14:44:28.249+08:00

Read some interesting trivia in a book, “The Silicon Boys” by David A. Kaplan on origin of “bug” i.e. a computer bug....The University of Pennsylvania’s ENIAC (Electronic Numerical Integrator and Computer) in 1946 was the first attempt at a large scale digital computer. It was a huge thing and had 18000 vacuum tubes. The warmth & light of ENIAC’s tubes presented a problem – moths liked them and

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-19047521419269684642007-05-03T18:04:00.000+08:002007-05-03T18:07:12.152+08:00

I read an interesting article on the recent iSuppli European Briefing series held in Hungary and reported by Drew Wilson in Electronic Business.While iSupply sees consumers with 2 main devices: one handset for communications & information and the other one for entertainment with internet, gaming, music & video, Nokia forecasts the merging of all useful functions into one gadget. Its senior

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-75122519869065287142007-04-25T19:50:00.000+08:002007-04-25T19:55:17.462+08:00

Synplicity rolled out its Synplify DSP ASIC Edition software at the Design Automation and Test Europe conference in France. Their earlier ESL synthesis tool was aimed at FPGA designs. With this new offering, they are targeting customers who use FPGA prototyping for their DSP based ASICs.Another recent news has been that TSMC is broadening its IP portfolio giving worries to IP providers and

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com4tag:blogger.com,1999:blog-10568590.post-83541073335938795312007-04-25T11:44:00.000+08:002007-04-25T12:00:50.816+08:00

TSMC is broadening it’s portfolio of internally developed IPs and 3rd party IPs. It had started a program called IP-9000, later renamed to Active Accuracy Assurance Program, to qualify various IPs in its foundries. The objective was to expedite the design time with silicon proven 3rd party IPs.With shorter design cycle time and with IPs becoming mandatory blocks in a design, the need for silicon

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-36718706523236167742007-04-23T20:45:00.000+08:002007-04-23T20:48:22.287+08:00

UMC is the latest one to join the Cadence camp. Earlier this month, Cadence and TSMC had announced the availability of 65nm libraries from TSMC supporting CPF (Common Power Format).The market forces will decide who the winner is; but the poor user has to cope with this standards battle in the interim.

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com2tag:blogger.com,1999:blog-10568590.post-82228570755817745382007-04-09T23:04:00.000+08:002007-04-09T23:13:50.670+08:00

TI’s CEO & President, Rich Templeton, mentioned the importance of medical equipment biz for India’s semiconductor industry during his visit to India.Applications in the medical area, along with automotive applications hold prominence in the near future for the semiconductor industry in general, albeit a lot more in emerging markets like India and China. While consumer and telecom applications

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com2tag:blogger.com,1999:blog-10568590.post-73787141570748454632007-03-31T19:24:00.000+08:002007-03-31T19:27:40.274+08:00

So, hopes of a single power format seem remote and it is increasingly likely that the industry will need to support both standards i.e. CPF as well as UPF. Well, now the market forces will decide the winner……

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-81830719754587375232007-03-31T13:54:00.000+08:002007-03-31T13:57:32.831+08:00

I had reported in an earlier post “India outlines long awaited IC policy”, that the Indian govt.’s announcement of Special Incentives Package Scheme is likely to be followed by announcements by potential investors.While SemIndia had already proposed investment in partnership with AMD, the latest one is from Hindustan Semiconductor Manufacturing Corporation (HSMC), a Silicon Valley-based

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-49835753007205022462007-03-20T20:06:00.000+08:002007-03-20T20:09:17.599+08:00

Read this article (Nadamuni says, in EE Times) ; Wanted to submit my comments there but looks like a perpetual error while submitting comments.....2 issues which could be of concern to the fledgling Indian semiconductor market are: potential overcapacity situation and offering an attractive pricing strategy in face of strong competition from established regional foundries.Investing with new

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-3358322566926965832007-03-19T11:12:00.000+08:002007-03-19T11:14:43.336+08:00

UMC has announced that it plans to open a support office in Hyderabad, India. The main charter is to support India based customers. This is close on heels with TSMC’s setting up office in Bangalore, India.

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-60691585800225264112007-03-12T17:48:00.000+08:002007-03-12T17:50:00.627+08:00

There were some very interesting insights from the commentary on the panel discussion on the above topic.People have been long talking about the demise of ASICs….and these are still around. A good starting point taken, hence, was the definition of ASICs itself. ASICs have undergone a transformation over the years and have evolved much from the traditional cell based ASICs.Some interesting

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-40794664306524945192007-03-09T17:34:00.000+08:002007-03-09T17:37:05.590+08:00

Cisco and IBM are planning to develop a platform based on open standards to allow unified communications and collaborations in their applications. IBM will offer a set of application programming interfaces (APIs) as a subset of its Lotus Sametime collaboration software and Cisco will offer communication APIs for accessing voice and video services.Cisco and IBM also will roll out "specific client

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-71230874101710196152007-03-06T22:37:00.000+08:002007-03-06T22:58:14.260+08:00

Walter Ng, senior director of platform alliances at Chartered Semiconductor Manufacturing noted in his presentation at the SPIE Advanced Lithography Conference last week that while there are some good point tools for DFM, integrated DFM solutions are still lacking.As I noted in an earlier post, Why can’t we do it in EDA?, it is a huge task for a single vendor to handle even most of the important

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-31614565581490215102007-02-27T15:52:00.000+08:002007-02-27T15:55:11.597+08:00

After several hiccups, India has announced its IC policy.Dubbed the Special Incentive Package Scheme, the initiative is focused on attracting investments for setting up semiconductor plants and other technology manufacturing industries. Semiconductor companies seeking incentives—which will be 20 percent of the capital expenditure during the first 10 years—will have to invest a minimum $550

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com2tag:blogger.com,1999:blog-10568590.post-51182647805698854922007-02-23T19:13:00.000+08:002007-02-23T19:17:15.016+08:00

So, the DFM consolidation has begun…..While acquisitions of DFM companies by EDA vendors was already there, this is the first merger between 2 DFM companies. Blaze’s parametric DFM expertise complements Aprio’s lithography analysis skill-set. Together they can synergize on DFM analysis as well as optimization and address both manufacturing as well as the designer sets.I had pointed out in an

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-89639689357206697532007-02-23T16:47:00.000+08:002007-02-23T19:18:36.807+08:00

Yet another company exits the Structured ASIC arena. After LSI Logic and then Synplicity, it’s now the turn of NEC. This is in line with a string of closures/layoffs and policy changes announced by Mr. Nakajima, NEC’s president.NEC feels that Structured ASICs have not grown to a big biz yet and is risky to invest large resources in it. This is further aggravated when the company itself is not

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-61766035723094077152007-02-16T13:07:00.000+08:002007-02-23T19:19:48.846+08:00

ISA-Ernst & Young, India’s recently released report presents a snapshot of India’s semicon industry.Some of the salient points are:Talent quality: Moderate (US rated very high)Talent Availability & scalability: Very Well (4th amongst peers, US rated 3rd )Technical education quality: Moderate (rated 5th, US rated very high)Talent cost advantage: Very well (Best along with China, US rated lowest)

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-51791162890108033622007-02-14T14:01:00.000+08:002007-02-23T19:20:13.088+08:00

A new tool in the DFM arena –Solido Design Automation has announced a tool for transistor level statistical design & verification. Unlike most of the DFM touted tools in the market, this one is to be used by designers prior to layout.It promises 5 basic capabilities –1. Statistical sampling that describes how processes can vary so that circuit simulators can estimate possible outputs.2. Tradeoff

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-85236717473833034062007-02-12T19:03:00.000+08:002007-02-23T19:20:44.217+08:00

With verification consuming up to 70% of design effort and debug up to 50% of that time (this means up to 35% of overall design time is spent understanding how a design works or why it doesn't!) - I share Richard Goering’s musing that it’s a wonder that EDA vendors have paid little attention to post-silicon debug.Post-silicon validation being a confrontational sale may be a significant hurdle for

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-63580378169773132052007-02-11T22:28:00.000+08:002007-02-23T19:21:17.113+08:00

A couple of contrasting views over the fab technology direction that India should follow was reported from the ISA Vision Summit 2007. While one view stated that it’ll be prudent for India to initially establish manufacturing capacities in older technologies and address those requirements which are not addressed by the more competitive larger multinational companies. Else it will fall prey to

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-91313158148609614012007-02-11T21:54:00.000+08:002007-02-23T19:22:21.313+08:00

An interesting exchange of ideas reported in Electronics News recently.DFM is the bridge between design and manufacturing. Most of the tools in the DFM arena are now towards the manufacturing side i.e. improving OPC while a selected few are focusing on the design part of the bridge. I agree with the viewpoint that in the consolidation phase, it will be these selected few who stand a chance to

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-15139251414954139302007-02-06T12:35:00.000+08:002007-02-23T19:22:56.242+08:00

TSMC has announced the opening up of its office in Bangalore, India with the primary mission of supporting its existing customers with design activities in India. They see a huge increase in the number of advance technology designs coming from India.What surprises me is their delay till date. With no major advance tech fab in the country, delays in fab investments/policies and spurt of fabless

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-77840668998021691252007-02-01T15:15:00.000+08:002007-02-23T19:23:20.603+08:00

Cadence has deployed CPF (Common Power Format) into its existing tools. Rather than making it available as a special feature in tools that would have to be paid for separately, Cadence has made most of its existing tools CPF compliant.While this makes it more convenient for the user on one hand, he expresses the design power intent/requirements just once and then the system/design flow takes care

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-80128665187720398162007-01-29T23:10:00.000+08:002007-02-23T19:24:36.981+08:00

Intel is hogging the silicon limelight with it’s news on the technology breakthrough - usage of high-k and metal gate transistors for 45nm technology.Scaling without losing out much on leakage is the driving advantage. The major advantage, though, is that with this technique, Intel will not have to significantly change its current production process. This is different from the alternative

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-1169734358306218702007-01-25T22:09:00.000+08:002007-02-23T19:26:19.362+08:00

Another salvo to Crolles2 Alliance. After NXP’s announcement on its exit from Crolles2 Alliance, comes the statement from Freescale that it is joining the IBM Alliance.Apart from investing in leading edge chip R&D, some of the potential benefits for Freescale in this alliance are leveraging capacity at Chartered and possible wireless co-development efforts with Infineon. Freescale also expects to

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1169208978300052172007-01-19T20:13:00.000+08:002007-02-23T19:26:59.478+08:00

Cadence’s primary EDA rivals felt that Power Forward Initiative introduced by Cadence in May ’06 wasn’t open and inclusive and joined another coalition – Accellera UPF effort in Sep. Si2’s Low Power Committee (LPC) was set up in Oct as an attempt to bridge the gap and address users’ requirement of having a single low power specification format.Si2 first approved CPF 1.0 saying that its approval

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1169040716442147162007-01-17T21:30:00.000+08:002007-02-23T19:27:34.066+08:00

In its new avatar, Philips Semiconductor, now NXP exits Crolles2 Alliance, a partnership formed in 2000 and renewed in 2002, and teams up with TSMC.As we further scale the technologies and the fab and associated costs increase, alliances is no longer an option; it’s mandatory. Amongst the present big ones, the Chartered, IBM, Samsung, Infineon alliance seems to be the more promising one overall.

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1169036279527847032007-01-17T20:15:00.000+08:002007-02-23T19:28:01.607+08:00

A boost to SSTA…..Altos has introduced Variety, a SSTA library characterization tool. While there do exist similar tools in the market, Altos’ niche factor is that it supports multiple formats (unlike Cadence, Synopsys, IBM, Magma etc. which support only their proprietary formats). This is definitely an advantage as it gives flexibility to the user to switch across various flows/

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1168443970545318322007-01-10T23:43:00.000+08:002007-02-23T19:28:50.865+08:00

While launching iTV, Apple CEO, Steve Jobs mentioned, "Apple is in your den, in your living room, in your car, and in your pocket, I hope this gives you a little bit of an idea of where we're going."Now a few months down the road, Apple has indeed added another gizmo for the pocket by introducing iPhone. Yet another player in the mobile phone/smart phone market. This time, however, as it is from

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1166510547438717652006-12-19T14:39:00.000+08:002007-02-23T19:29:21.596+08:00

A highly interesting article in Electronic Business by Tam Harbert.Private equity firms target cash rich semiconductor entities, leverage on its cash flow to borrow more funds and then restructure, improve the company’s bottom line and then sell it or take it public; providing returns of 30-40%. Tam lists the reasons behind recent LBOs in the semiconductor space – industry being driven by the

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-1166109615473045762006-12-14T23:18:00.000+08:002007-02-23T19:30:00.526+08:00

Gartner predicts that there will not be any major fab investments for India in 2007. There indeed is a lot of buzz for India in the design space. It has led to major collaborations as well as investments. Global contract manufacturers have entered with an eye on the huge local market potential. While a few consortia have plans, some of which have started on their first stages, it will take some

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1166108340155934592006-12-14T22:56:00.000+08:002007-02-23T19:30:29.622+08:00

Yet another DFM tool in the market.DFM Blaze announced a DFM tool, Blaze IF, to address topology variations caused due to CMP. It intelligently inserts dummy metal fill patterns into a design layout taking into account not only the design requirements like power and timing needs, but also the electrical issues like signal integrity and IR drop – which traditional approaches to metal fill do not

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1165806198057156842006-12-11T11:02:00.000+08:002007-02-23T19:31:14.356+08:00

In October 2005, John Chambers, Chairman and CEO Cisco Systems had announced a 1.1 B$ investment in India. In his recent visit to India last week, he re-iterated Cisco’s commitment while outlining the importance of India in Cisco’s global growth strategy.Cisco’s key investments in India include a new R&D campus in Bangalore, increasing by threefold its local workforce, launching a manufacturing

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1165152082867658012006-12-03T21:19:00.000+08:002007-02-23T19:33:47.338+08:00

Qualcomm, with its IFM (Integrated Fabless Manufacturing) strategy is quietly but steadily decreasing the gap between itself and IDMs in new process adoption time. The world’s largest fabless design company is leading the way in how the fabless design community needs to overcome the DSM hurdles of the widening gaps between IC design and manufacturing flows.While not exactly striving to be process

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com2tag:blogger.com,1999:blog-10568590.post-1163599999985561912006-11-15T22:12:00.000+08:002006-11-15T22:13:20.720+08:00

An interesting take on the EDA industry evolution and look into the trend by Leon Stok, director of EDA for IBM's Systems and Technology Group in a keynote address at the International Conference on Computer Aided Design (ICCAD).Stok identified three previous innovation eras in the EDA industry — those of invention, implementation, and integration. The fourth era, he said, is the one we're about

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1163593709510681632006-11-15T20:25:00.000+08:002006-11-15T20:28:30.353+08:00

The organizers of ICCAD (International Conference on Computer Aided Design) decided to do something different and added a designer’s perspective track this year."Our goal is to bridge the gap between practitioners and research," said ICCAD general chair Soha Hassoun, an associate professor of electrical engineering and computer science at Tufts University (Medford, Mass.), in opening remarks at

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1163062133443439142006-11-09T16:47:00.000+08:002006-11-09T16:48:53.806+08:00

Atheros recently picked up Attansic Technology, a designer of Ethernet chips in Taiwan for its Gigabit Ethernet technology for 802.11n market. Attansic is a subsidiary of Asustek. Craig Barratt, CEO of Atheros said, “there has really been tremendous growth in companies in Taiwan doing pretty impressive R&D, creative engineering and product development.”Moving to India – India needs to include IPs

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1162551909090022162006-11-03T19:00:00.000+08:002006-11-03T19:05:10.260+08:00

From what had earlier started as point engagements or doing auxillary services, semiconductor design companies in India are now working on not only the leading edge technologies (which they were still doing in the past as point engagements) but also end to end projects. In doing so, the Indian design engineers have been able to broaden their skill set as compared to quite a few of their

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1162454231682656282006-11-02T15:54:00.000+08:002006-11-02T15:57:12.673+08:00

With technology advances, more & more features are being incorporated in the mobile phone. And the existing features are being further refined e.g. increasing video and audio quality and PDA functions thrown in. While this entices the young generation, executives as well as techno geeks across various generations and the upward swinging classes, there still remains two main chunks of a country’s

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1153912614482960742006-07-26T19:15:00.000+08:002006-08-03T15:06:25.253+08:00

This was the questioned posed by Chairman of Orb Networks and former CEO of Cadence, Joe Costello in his DAC 2006 keynote speech.The “it” referred to here is the mix and match of new plug-ins (internal and external), bundling things on top of others’ offerings and selling directly to customers.With the increasing complexity of technological challenges compounded by rising market pressures, it

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-1153909245827228952006-07-26T18:18:00.000+08:002006-07-26T18:20:46.106+08:00

As pointed out in the article, most designers treat IP as a product. However, this product rarely comes with a guarantee; which is not that surprising. It’ll be almost suicidal given the argument that IPs are not plug in objects. Not only the IP’s functionality but also its interface and integration with the other components in the system determine whether the chip will work or not. And a

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1152864569639381022006-07-14T16:06:00.000+08:002006-07-14T16:14:16.416+08:00

China Syndrome cooling, an article by Ed Sperling in Reed Electronics points out the possible waning of the “Invest in the Booming China Market” wave by electronics companies. Possible reasons cited by them for hedging their bets in other regions and in other countries include:- China’s emphasis on allowing other cities besides Shanghai and Beijing to partake in the economic revolution is making

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1151993743905435122006-07-04T14:10:00.000+08:002006-07-04T14:15:44.170+08:00

TSMC had recently unveiled its 65nm DFM compliance design support ecosystem by coming out with its DFM Data kit compiled with DFM Unified Format (DUF). DUF has been developed by TSMC to align DFM tools. This kit would help to put the fabless designers on an equal footing with the IDMs. The format, though, models only random and systematic defects with parametric defects being planned for a future

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1151389366787854122006-06-27T14:20:00.000+08:002006-06-27T14:22:47.476+08:00

Thermal analysis is gaining momentum. While these analysis tools were there in the past especially with analog and mixed signal devices, they’ve lately gained prominence with sub 90nm digital designs too.Thermal analysis tools track thermal gradients across the die. Uneven shifting of the threshold voltage, timing violations (clock timings are especially sensitive to delay variations caused by

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1149839340620869882006-06-09T15:36:00.000+08:002006-06-09T15:49:00.700+08:00

A snapshot analysis from IC Design Houses Survey 2006 (China and Taiwan) report done by EE TimesA. Revenues a. 2005 revenues (expected) Average 5.4 M$ in China, 9.2 M$ in Taiwan China 15 M$ and above–19 %,1-2.9 M$ - 19%,less than 250 K$ and 3-6.9M-17% Broadly uniformly distributed Taiwan

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1149838548851233092006-06-09T15:27:00.000+08:002006-06-09T15:35:49.230+08:00

Gartner during it's mid year update outlined 5 megatrends facing the industry - continued integration due to Moore’s Law, increasing cost and scale of manufacturing facilities, the role the consumer markets will have going forward, service providers of various kinds, and a set of new and potentially disruptive technologies.One more major trend that I perceive, is increasing collaboration. Whether

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1149575358351580922006-06-06T14:27:00.000+08:002006-06-06T14:29:50.686+08:00

Yes, indeed the methodology should be done by people who know it best i.e. design engineers. EDA companies should step in to facilitate this and not formulate them. We should not have situations where the design engineer needs to grapple with firstly the design & process complexities and secondly with trying to fit the design tool into his design methodology. With the increasing complexities

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1141888258632965742006-03-09T15:09:00.000+08:002006-03-09T15:10:58.870+08:00

Yes, it indeed is true that the real assets of a company are it’s intellectual capital. Not being tangible in the conventional manner, this is not analysed to the extent it merits.Increasing your market share without upsetting your profit margin ; and all this while not letting your intellectual capital diminish is indeed a juggling act. While globalization pushes companies to compete

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1135140862870515732005-12-21T12:52:00.000+08:002005-12-21T12:54:23.100+08:00

Both ASIC and COT designs need the designer to fix the foundry at the onset. This is because the library and the design rules needed for both are supplied by the target foundry. COT, however, does have the flexibility for changing the foundry at a later stage provided the process is compatible across multiple foundries – however it still needs some verification to avoid problems on silicon.

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com2tag:blogger.com,1999:blog-10568590.post-1134459516447683982005-12-13T15:34:00.000+08:002005-12-13T15:38:43.133+08:00

To sell wafers, one needs tapeouts. Successful tapeouts require libraries and IPs validated on the target technology. And as technology advances, customers are more and more wary of getting their designs taped out with libraries and IPs not fully validated on silicon. So where does this lead a foundry with a ready advanced process but waiting for library & IP vendors to provide their wares on

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1133774039576895392005-12-05T17:05:00.000+08:002005-12-05T17:14:00.083+08:00

Mentors' CEO Walden Rhines' interview in Electronic Times (posted on 2/12/05) brought out 2 interesting points in the EDA industry :First is on the EDA industry growth which Rhines attributes mainly to developing new solutions to new problems, developing new methodologies & applying technology to different applications. With a very small growth in the number of designers and with tools and

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1133159675362032362005-11-28T14:32:00.000+08:002005-11-28T14:35:46.996+08:00

While most other competitors foresee more growth in China, Cisco sees an edge in India and is investing heavily there. The things going for India include an unregulated economy, less competitive environment & a growing market . It’s worries in China include weaker IP protection laws and an edge to home grown local companies like Huawei, Harbor Networks etc. through loans and government

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1132654441005047412005-11-22T18:12:00.000+08:002005-11-22T18:14:02.443+08:00

I read this paper, “Yield challenges require new DFM approach” by P.T Patel in EE Times. It’s very well written and informative.Yet another pointer to making the existing design tools (the focus in the article was on routing) more suitable for getting your design manufacturable.

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1132572310665818572005-11-21T19:21:00.000+08:002005-11-21T19:25:11.033+08:00

Quite an interesting article in Electronic Engineering Times by Richard Goering.Getting to basics ….In commercial space, a designer designs a chip with the objective that it should not only function as per specs but also be manufactured in a commercially viable mode. This is implicit. Else shouldn’t we have heard about tools like Design for Silicon Success/DFSS or DFFTSS….??Yes, we do have flows

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1132312386366919712005-11-18T19:11:00.000+08:002005-11-18T19:13:06.496+08:00

One of the potential solutions in addressing the challenges in manufacturing sub 90nm is in greater collaboration. How many of the existing top semiconductor companies can afford to be profitable while keeping their legs in both chip design as well as optimal yield DSM manufacturing ? One needs to focus upon ones’ strengths while leveraging with ones’ partners on others. Partnerships are

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-1131968120499303492005-11-14T19:32:00.000+08:002005-11-14T19:35:20.846+08:00

Unshackled IBM Microelectronics savors Game Box wins - a very interesting article by Ed Sperling in a special report, Movers & Shakers 2005, in Electronic Business online.Lining up 3 top gaming platforms, Sony PlayStation 3, Microsoft Xbox 360 and the follow on to the Nintendo GameCube as customers for it’s Cell Processor is a real volume play. In the absence of any real killer application, high

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1131965398406646542005-11-14T18:47:00.000+08:002005-11-14T18:49:58.420+08:00

Market research company, iSuppli Corp noted in a recent article posted in Electronic Engineering Times by Peter Clarke that India’s semiconductor design industry will nearly triple by 2010; it’s predicted to be 624M$ in ’05.Investment in India needs to be for a long term strategic reason. Companies jumping into the bandwagon solely for cost reduction will most likely lose out. Some of the very

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-1131359130229692622005-11-07T18:21:00.000+08:002005-11-07T18:25:30.243+08:00

The volumes need to justify the high costs involved in 45 nm. Costs include the mask cost (with 2 M$ not being ruled out), design challenges, variability & yield issues to count a few. The consumer market is the major drive for cost reduction and high volumes. However, it needs to be kept in mind that the market windows in this segment are shrinking. To capitalize on these high volumes, chip

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1131097326263787262005-11-04T17:36:00.000+08:002005-11-04T17:42:06.496+08:00

The microelectronics industry owes much to Moore’s Law – the number of transistors on a chip double every 2 years. It’s a principle which has been solid and consistent for the last 3 decades.In an article posted by Bill Roberts in Electronic Business, Satoru Ito, CEO of Renesas Technology says. "Because of Moore's Law, the industry has had a common road map for technological innovation. This

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1131093419716149302005-11-04T16:33:00.000+08:002005-11-04T16:36:59.726+08:00

It’s heartening to note Indian government’s proactive stance in putting India’s footprint on the hardware arena too. Several multinationals have a design/R&D setup in India. While most initially came for the comparatively cheap manpower, they’ve stayed put for the brain power and are now investing for innovation. Several local services and product companies too have sprung up. But what has been

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-1130926399357467122005-11-02T18:12:00.000+08:002005-11-02T18:13:21.626+08:00

IBMs’ VC Group’s strategy outlines a varying and rewarding approach to the functioning of a ventures capital arm of a large company. Deviating from the well trodden path of investing cash for ROI, it is emphasizing more on relationships, interests’ alignment and development of a mutually supported ecosystem.As IBM Corp. VP & MD of it’s VC group, Claudia Fan Munce, stresses in an article in EE

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1130922636915156892005-11-02T17:03:00.000+08:002005-11-02T17:10:36.926+08:00

With consumer electronics joining PCs and internet based communications as a major semiconductor industry driver, fabs are getting into another league – Gigafabs. TSMC’s Mark Liu differentiates between the fabs on the basis of monthly wafers capacity – 80 to100K qualify as gigafabs while megafabs have a run rate of 50k wafers.Consumer electronics market has a very short market window including a

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1130159285779849692005-10-24T21:00:00.000+08:002005-10-24T21:12:53.256+08:00

The latest in the battle for the new high definition DVD standard – Warner to back Blu-ray and HD-DVD format. Warner Bros. Entertainment, till now a key HD-DVD backer among the Hollywood studios announced that it’ll release films on Blu-ray format too.The recent issue of Business Week has a very well written article giving the synopsis of the struggles in this standard.The key entities in this

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com32tag:blogger.com,1999:blog-10568590.post-1129720814920739442005-10-19T19:18:00.000+08:002005-10-19T19:33:04.973+08:00

I recently read the latest report from EE Times and Gartner Dataquest on Design Trends & EDA Tools : China & Taiwan. It can be accessed from their website http://www.eetasia.com.The report makes a very interesting reading and made me ponder on a few points.......ASIC Design segmentA. Application segmentWhile consumer applications remained the major application segment in Taiwan (as was in ’04 too

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-1129033231712197712005-10-11T20:14:00.000+08:002005-10-11T20:20:31.730+08:00

Comments on the above article (written by Vince Hopkins in Electronic News)........Tweak a bit here and there for it’s derivatives, term it in various categories, yes, the bottom line is identical value propositions i.e. reduced NRE and faster time to market which have become critical factors in the transient markets and DSM technos.So, one has variants: a 90% ready netlist which at least in

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1128514487707394422005-10-05T20:11:00.000+08:002005-10-05T20:14:47.713+08:00

Comments on “UMC’s Hu envisions a new model for foundry business” in Electronic Engineering Times by Ron WilsonWhile it’s true that the leading foundries in this age must have the capabilities of an integrated device manufacturer, the transition from foundry to solutions provider is not an altogether new biz model nor is it an entirely different vision for foundry companies.Quite a few years

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-1128143587796577372005-10-01T13:04:00.000+08:002005-10-01T13:13:07.803+08:00

Refering to "ASIC makers piece together their options" – Ron Wilson & Brian Fuller in EE TimesIn an ideal world, the various entities i.e. Design company, foundry, EDA vendor, Packaging, Testing etc. will work together with the customer in a free information flow environment (albeit respecting each others IP rights). Bolstered by the information flow, they can provide collectively the customer

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1127738111225282772005-09-26T20:32:00.000+08:002005-09-26T20:35:11.236+08:00

Comments on “Freescale partners with Indian Design Houses” by K.C Krishnadas in EE TimesThis is indeed a strategy leading to multiple mutual benefits i.e. if implemented in the right spirit.The right IP, the right technology, the optimal design flow, the right timing: neither of these factors can hold on their own in today’s volatile market. The customer wants a solution, not a set of leggo

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1127119220881880572005-09-19T16:39:00.000+08:002005-09-19T16:45:07.430+08:00

Refering to When infrastructure is essence: Open-Silicon automates the flow , an article posted in Electronic Engineering Times by Ron Wilson on Sep 16 2005ASIC implementation is a complex procedure.Automating it is more complex.And adhering to the automated flow & achieving the intended results is an art in itself.Every ASIC design team would have ventured into attempting to automate the

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-1126856249450981352005-09-16T15:32:00.000+08:002005-09-16T15:37:50.570+08:00

Comments on “Seeing Taiwan as centre of IC world”, an interview of Nicky Lu by Mike ClendininIPs fill up the differentiating edge gap in a product leading to higher sales and thus higher revenues. But the broad definition of IP has also changed over the years. What was initially termed as the “winning” block in a chip has now become a generic part. So one needs to keep up innovating to come up

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1125572267504219792005-09-01T18:51:00.000+08:002005-09-01T18:57:47.510+08:00

Refering to Leaky chips test designers' skills by Mike Clendinin in www.eetasia.comYes, one can no longer rely upon deploying the power optimization techniques in the later part of the design. For that matter, it’s not sufficient to keep it restricted to any one design phase. It needs to be strategized and implemented right from algorithmic level, through architecture level and down to the

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-1124707964524303792005-08-22T18:45:00.000+08:002005-08-22T18:52:44.530+08:00

Refering to Are ESL and DFM false hopes? by Richard Goering in www.eetasia.com -ESL and DFM are the two buzzwords in the DSM design space. With the spiraling costs involved, such techniques are getting into the mandatory zone. If we say that ESL is too domain and application specific, it’s just following another important trend in the market – that of structured ASICs/platform ASICs. You get

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1124277208182634972005-08-17T19:08:00.000+08:002005-08-17T19:15:05.746+08:00

ASICs started getting complex. Teams got globally dispersed. This was now no longer restricted to the foundries or the chip backend operations but also to the design team. Add to that a customer sitting in another location. To get a synergy across these islands of expertise for a FTSS moved Program Management role to a necessity. A necessity highlighted by the spiraling cost of design re-spins

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0tag:blogger.com,1999:blog-10568590.post-1122628547541065132005-07-29T17:03:00.000+08:002005-07-29T17:22:36.076+08:00

Peter Clarke’s article PDA fad is over makes a compelling reading.The appeal of the decreasing form factor in consumer gadgets made it’s advent not too long ago and was quickly embraced by the “young-on the move-possess-latest-gizmo” crowd. Along with came the expectation of packing of multiple features leading the industry to be perpetually kept on a delicate balancing act of features vs. size.

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com1tag:blogger.com,1999:blog-10568590.post-1107313967559616872005-02-02T11:10:00.000+08:002005-10-06T15:18:25.723+08:00

This blog shall attempt to cover thoughts and ideas related to the VLSI Ecosystem

Meenu Sarinhttp://www.blogger.com/profile/08877235505809649015noreply@blogger.com0